Model-Driven Design Using IEC 61499: A Synchronous Approach for Embedded and Automation Systems

A book by Li Hsien Yoong

2015 - 214 pages 

Abstract

This book describes a novel approach for the design of embedded systems and industrial automation systems, using a unified model-driven approach that is applicable in both domains. The authors illustrate their methodology, using the IEC 61499 standard as the main vehicle for specification, verification, static timing analysis and automated code synthesis.

The well-known synchronous approach is used as the main vehicle for defining an unambiguous semantics that ensures determinism and deadlock freedom. The proposed approach also ensures very efficient implementations either on small-scale embedded devices or on industry-scale programmable automation controllers (PACs). It can be used for both centralized and distributed implementations. Significantly, the proposed approach can be used without the need for any run-time support.

This approach, for the first time, blurs the gap between embedded systems and automation systems and can be applied in wide-ranging applications in automotive, robotics, and industrial control systems.

Several realistic examples are used to demonstrate for readers how the methodology can enable them to reduce the time-to-market, while improving the design quality and productivity.

Table of contents

1 Introduction 

1.1 Embedded and Automation Systems: Are They Really Different? 

1.2 Contributions that Harness This Convergence 

1.3 Current State 

1.4 The IEC 61499 Standard 

1.5 Preliminaries 

1.6 Formal Model for Function Block Systems 

1.7 Software Synthesis 

1.8 Abstract Communication Patterns 

1.9 Static Analysis 

1.10 Book Organization

2 IEC 61499 in a Nutshell 

2.1 Distribution Station 

2.2 Basic Function Block

2.2.1 A Function Block Interface 

2.2.2 Execution Control Chart 

2.2.3 Algorithms 

2.3 Composite Function Blocks 

2.3.1 Type Specification 

2.4 Service Interface Function Blocks 

2.5 System, Devices and Resources

2.5.1 Device Model

2.5.2 Resource Model 

2.5.3 System Model 

2.5.4 Implementation of the Distribution Station 

2.6 Adapter Interfaces 

2.7 Execution Models for Function Blocks

2.7.1 FBRT

2.7.2 FORTE 

2.7.3 FUBER 

2.7.4 ISaGRAF 

2.7.5 Synchronous Execution 

2.8 Discussion

3 Introduction to Synchronous Programming Using Esterel

3.1 The Synchronous Programming Paradigm 

3.2 Syntax and Intuitive Semantics 

3.2.1 Derived Statements 

3.2.2 Examples

3.2.3 Encoding FSMs and Modularity Through Module Reuse 

3.3 Case Study: A Lift Controller 

3.3.1 Specification 

3.3.2 Design in Esterel 

3.4 Esterel Tutorial

3.4.1 Design in Esterel 

3.4.2 Second Variant of the Producer-Consumer

3.4.3 Third Variant of the Producer-Consumer

3.5 Synchronous Broadcast and Causality

3.5.1 Your Task 

3.5.2 Reincarnation 

3.5.3 Your Task 

3.5.4 Data Handling for User-Defined Types 

3.6 Discussion

4 Formal Model for IEC 61499 Function Blocks 

4.1 Variations in Function Block Execution 

4.2 Synchronous Model for Function Blocks

4.2.1 The Cruise Control Example

4.3 Semantics of Synchronous Function Blocks 

4.3.1 Formal Semantics 

4.3.2 Definitions and Proofs 

4.4 Discussion

5 Efficient Code Synthesis from Function Blocks 

5.1 Revisiting Delayed Communication 

5.2 Effects on Scheduling Order and Communication 

5.3 Code Generation for Function Blocks 

5.4 Translating Basic Function Blocks 

5.5 Translating Composite Function Blocks

5.5.1 Implementing Delayed Communication 

5.5.2 Implementing Instantaneous Communication 

5.6 Function Blocks in Distributed Systems

5.7 Communications 

5.7.1 Connections and Channels 

5.7.2 Bounded Lossless and Lossy Channels 

5.8 IEC 61499 Communication Function Blocks 

5.8.1 Client-Server Communication Function Blocks 

5.8.2 Publish-Subscribe Communication Function Blocks 

5.9 Generating Distributed Code 

5.9.1 Synthesizing Communication Function Blocks

5.10 Discussion

6 Verification of Function Blocks 

6.1 Railroad Crossing Control System

6.1.1 System Properties 

6.1.2 Implementation of Railroad System 

6.2 Formalism for Function Blocks 

6.2.1 Basic Function Blocks 

6.2.2 Function Blocks to SKS

6.2.3 Function Blocks Networks 

6.2.4 Function Blocks Observers 

6.3 Verification of Function Blocks 

6.3.1 Model Checking 

6.3.2 Model Checking of Function Blocks 

6.3.3 Reachability Analysis 

6.3.4 Reachability Analysis of Function Blocks 

6.3.5 Closed-Loop Verification 

6.4 Discussion

7 Timing Analysis 

7.1 Introduction 

7.2 Static Timing Analysis Overview 

7.2.1 Control Flow Graph 

7.2.2 Speculative Hardware Features 

7.2.3 Pipelined Execution 

7.2.4 Branch Predictor

7.2.5 Hardware Modelling Using Abstract Interpretation 

7.3 Path Enumeration Techniques

7.3.1 Max-Plus

7.3.2 Integer Linear Programming 

7.3.3 Model Checking 

7.4 Static Timing Analysis of Function Blocks Using a Software Model Checker 

7.4.1 Compilation to C 

7.4.2 C Code Modification 

7.5 Timing Analysis 

7.6 Discussion

8 Case Studies 

8.1 Cruise Control System 

8.1.1 Function Block Implementation of a Cruise Controller 

8.2 Lift Control System

8.2.1 Function Block Implementation of the Lift Control System 

8.3 Cardiac Pacemaker 

8.3.1 Function Block Implementation of VVI Mode Pacemaker

8.4 Boiler Safety System 

8.4.1 Function Block Implementation of the Boiler Safety System 

8.5 Baggage Handling System 

8.5.1 Simulation and Visualisation of the BHS 

8.5.2 Function Block Implementation of the BHS 

8.6 Introduction to BlokIDE

8.6.1 Automatic Code Generation 

8.6.2 Simulation 

8.6.3 Device Deployment 

8.7 Discussion